Memristor-Emulating-Integrate-and-Fire Neuron-Based Fully Neuromorphic Framework for Pattern Recognition

The need for low-power, area-efficient, and low-complexity hardware architectures has become an essential axis of emerging neuromorphic frameworks. Moreover, in the prevailing architectures for implementing the neural algorithms, the synaptic weights are digitally stored, which is a major Von-Neumann bottleneck in terms of energy and area. We thus introduce, for the first time, an area-efficient Memristor-Emulating-Integrate-and-Fire (MEIF) neuron-based fully neuromorphic architecture for pattern recognition. This pattern recognition scheme is based on the MEIF neuron circuit that has significantly less hardware complexity. The simulation results are based on a 1.8 V, 180-nm CMOS technology. Simulation-based experimental results show that our neuromorphic system, comprising 48 neurons, has the recognition capability with an average energy consumption of <tex-math notation="LaTeX">≈ 5.255 </tex-math> pJ per neuron for the 4X3 pixel patterns.