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Spintronic-based neuromorphic hardware enables high-density and rapid data processing at nanoscale lengths. leveraged by the topologically protected spin configurations and low current densities to manipulate magnetic structures such as skyrmion and domain wall. The paper presents a compact, energy-efficient multi-bit skyrmionic synapse and domain wall-based ReLU with max-pooling functionalities for hardware neural network applications. A 4-bit,5-bit, and 6-bit skyrmionic synapse is proposed, featuring a circular bilayer vortex-based geometry. The 4-bit skyrmionic synapse consumes an ultra-low energy of 0.8724 fJ per weight update. The proposed skyrmionic synapse comprises an ultra-thin ferromagnetic layer with a strong Dzyaloshinskii-Moriya interaction and a polarizer layer with a vortex-like spin configuration. The interaction between perpendicular current flow and the labyrinth maze-like uniaxial anisotropy profiles induce skyrmionic gyration, resulting in long-term potentiation (LTP) and long-term depression (LTD) that modifies the synaptic weights. We develop a phenomenology of the synaptic device, implementing 16-state (4-bit), 32-state (5-bit), and 64-state (6-bit) skyrmionic synapses, analyzing them quantitatively using micromagnetics simulations. Furthermore, we design a CMOS hybrid domain wall-based ReLU-max pooled circuit. The activation function works on the variation of the domain wall position implying variation in the device resistance on encountering uniaxial anisotropy variation along the track. To demonstrate the practical application of our 4-bit (16-state) skyrmionic synapse with domain wall-based ReLU-Max Pooling circuit we integrate it into an inference-based convolutional neural network (CNN) for pattern recognition, achieving a comparable accuracy of 98.07% to software-based ideal training.
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Gupta et al. (2024) studied this question.
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