High‐Performance Tin‐Halide Perovskite Transistors Enabled by Multiple A‐Cation Engineering

Abstract Metal‐halide perovskite semiconductors have garnered great attention in optoelectronic devices due to their remarkable properties and processing capabilities. Among them, tin (Sn 2+ ) perovskites stand out as promising candidates for use as channel layers in high‐performance p‐channel thin‐film transistors (TFTs) owing to their excellent hole transport property. In this study, a multi A‐cation approach is applied to pure Sn 2+ perovskite, incorporating a small amount (7 mol%) of bulky PEA + cation. This addition greatly improved the crystallinity and orientation of 3D FA 0.9 Cs 0.1 SnI 3 perovskite, leading to optimized p‐channel Sn 2+ ‐perovskite TFT with a hole mobility of ≈18 cm 2 V −1 s −1 , a high on/off current ratio of 10 8 , and a small subthreshold swing of 0.5 V dec −1 . These TFTs also exhibit a low contact resistance of 87 Ω·cm, attributed to the improved electrode/perovskite channel interface. Furthermore, the TFTs are utilized as an electrical characterization platform to study the charge transport properties and interfacial defects using the low‐frequency noise method, providing insights into the interface properties of perovskite electronic devices.