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Under the high-frequency and high-dv/dt pulse excitation of SiC inverter, hairpin winding is susceptible to non-uniform voltage stress, which will threaten its insulation reliability. Currently, new topologies of hairpin windings are constantly emerging, but most focus on low-loss design, with limited studies addressing low-voltage stress. This lack of attention leads to hidden dangers in their reliability design. In order to bridge this gap, this paper conducts a comprehensive comparative analysis of the interturn voltage stress of hairpin windings with different topologies. Firstly, the high-frequency equivalent circuit model of single-turn coil, considering bilateral conductor coupling effect of hairpin windings, is proposed and validated through experiments. Then, the high-frequency models of hairpin windings with various topologies are established, and the corresponding interturn voltage stress distribution is calculated using the field-circuit coupling finite element method. Finally, through comprehensive analysis and comparison, the paper presents low-voltage stress design principles for hairpin windings from the perspectives of insulation design and transposition topology.
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Ju et al. (2024) studied this question.
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