Developing Process Design Kit (Q-PDK) for Co-Integrated Quantum computers

The design of Quantum Processing Units (QPUs) in modern quantum computers heavily relies on physical fabrication for design validations. To efficiently perform this validation prior to fabrication, a simulative Process Design Kit (Q-PDK) for co-integrated QPUs is presented in this work. The Q-PDK is built on a Verilog-A based framework and is demonstrated using MALTAB. The proposed Q-PDK uniquely captures the performance of qubits, classical CMOS devices and FinFETs based SETs for targeting the design of qubits and its control and readout electronics, all working at cryogenic temperatures. The use of Q-PDK can significantly help reduce the cost of testing new designs for QPU and thus boost the research towards the development of general-purpose quantum computers.