Study and Design of an Efficient Rectifier and DC Voltage Limiter of a UHF RFID Tag Passive in 180nm CMOS Technology

In this paper a highly efficient CMOS rectifier in radiofrequency (RF) energy harvesting and wireless power transmission using low start-up voltage, followed by a low-power voltage limiter have been presented with the aim of improving the performance of the Passive UHF (Ultra High Frequency) RFID (Radio-Frequency Identification) tag. Simulation results For an RF input of 900 MHz and low input signals, show that the five-stage configuration of the rectifier circuit under consideration attains outstanding power conversion efficiency (PCE), e.g: a PCE of 40.81% for Pin = - 5 dBm and 31.25% for Pin = - 10 dBm, and it reaches 68.95% for Pin = 14 dBm. When RF input power increases, particularly when the reader and tag are in close proximity, it becomes essential to protect the RFID tag's analog front-end circuits from damage, so the use of a voltage limiter is crucial. In this context, a voltage limiter circuit has been developed. The design of the envisioned voltage limiter relies on the utilization of multi-lead mirrors, and our simulation results show that the limiting voltage is 1.94 V. Note that both architectures of these proposed circuits (rectifier + limiter) have been designed in standard 180 nm CMOS technology.