Temperature-Insensitive Soft-Error-Tolerant Flip-Flop Design For Automotive Electronics

Many existing soft-error-tolerant flip-flop designs (e.g., MDAD-FF, SETU-TOFF, SEDR-FF) apply delayed latching to mitigate strikes of radiation particles. However, according to AEC-Q100 (Grade 1), automotive electronics are permitted to operate at temperatures between −40°C to 125°C, resulting in two reliability issues: (1) protection failure and (2) timing degradation. At −40°C, these rad-hard FF designs are capable of providing a worst-case delay of only 113 ps, ineffective in protecting against 77-LET particles (which require 200 ps in 45 nm process). At 125°C, however, the performance of these FF designs may degrade to 386 ps, resulting in more timing violations. Therefore, RAV-FF is proposed to address these two issues by incorporating a MOSFET capacitance (MCAP) to generate sufficient delay to delay clock and a current-control transistor (CC) to stabilize delay at different temperature corners. Experimental results indicate that RAV-FF provides effective soft-error protection in the temperature range of −40°C to 125°C by ensuring a delay of at least 200 ps with only 3% variation.