Wide bandgap power devices, such as GaN and SiC FETs, have garnered significant attention in the field of power electronics due to their remarkable switching electrical characteristics. However, the widespread adoption of these emerging devices for industrial mass production is hindered by reliability concerns. To mitigate such, continuous monitoring and assessment of device health condition become essential. This paper discusses the key issues of implementing chip-level power device condition monitoring, including precursor measurement and calibration, multi-precursor concurrent monitoring processes, and condition monitoring and power circuit co-design concept. Experimental studies show that chip-level condition monitoring represents a new frontier in enhancing power device reliability, with highly desirable merits of noninvasiveness, high efficacy, and low cost and power overheads.
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D. Brian (2024) studied this question.
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