A 7V/μs-DVS Class-G Digital-Shunt-Aided Buck Voltage Regulator Achieving a 7% Dynamic-Efficiency Drop at a 600kHz DVS Occurrence Frequency in 28nm CMOS

As system-on-chips (SoCs) become more complex, the need for voltage regulators to quickly respond to dynamic workloads grows increasingly critical. To overcome the slow response of inductor-based DC-DC converters, hybrid power systems, assisted by a dynamic shunt stage, have been actively studied [1]–[4] (top of Fig. 1). Leveraging the fast shunt stage, previous hybrid buck-shunt voltage regulators have demonstrated sub-us dynamic voltage scaling (DVS) [2], [4] and voltage-droop mitigation [1], [3]. Nonetheless, the frequent activation of the shunt stage cannot be overlooked, as it leads to considerable energy loss <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">(ELOSS)</tex> , degrading dynamic efficiency. The <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ELOSS</tex> dissipated by the shunt stage arises mainly from two factors: the shunt stage's dropout voltage, <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">VDO(= VIN - VOUT)</tex> , and its supplying charge, <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">QSHUNT</tex> . Although [3] mitigates <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ELOSS</tex> via a reduced V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DO</inf> <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">(=VA U X-VO U T)</tex> , this approach requires an auxiliary supply voltage, <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">VAUX(< VIN)</tex> . While <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">VOUT</tex> quickly settles with the aid of the shunt stage after a load (or voltage) change, a certain handover time is still needed for the inductor current <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">(IIND)</tex> to align with the changed load current <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">(ILOAD)</tex> . During this handover period, the shortfall in <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ILOAD</tex> must be replenished by the shunt current, <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ISHUNT(=ILOAD-IIND)</tex> . This becomes a major factor that unnecessarily increases <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">QSHUNT</tex> , as depicted in the middle-right of Fig. 1. Moreover, the lack of correlation between <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ISHUNT</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">IIND</tex> in [2], [3] tends to prolong the handover time further, exacerbating the increase in <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">QSHUNT</tex> .