The explosion of visual data in diverse fields, from self-driving cars navigating dynamic environments to medical diagnostics demanding precise diagnoses, creates an unyielding demand for real-time image classification with high accuracy and low latency. Deep Neural Networks (DNNs) have become powerful tools for this task, but their ever-increasing complexity challenges traditional CPUs and even GPUs. This abstract explores how Field-Programmable Gate Arrays (FPGAs) can be harnessed as hardware accelerators to overcome these limitations. Field-Programmable Gate Arrays (FPGAs) emerge as a promising solution due to their unique architecture. Unlike CPUs and GPUs with fixed functionalities, FPGAs can be dynamically reconfigured to match the specific needs of a DNN, enabling efficient parallel processing and optimized execution. This tailored approach delivers superior performance compared to traditional processors, addressing the speed and power limitations crucial for real-time image classification tasks. This paper mainly focuses on optimizing the architecture to balance computational efficiency with accuracy.
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Maria et al. (2024) studied this question.
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