This paper presents a low-power semantic LiDAR Simultaneous Localization and Mapping (SLAM) processor that can fully support inference of point neural network (PNN), LiDAR odometry, and mapping. The processor is realized with four key features: 1) multiple granularity parallel multi-core architecture, 2) kNN cores with spherical-bin searching, 3) global point-level task schedular with 2-step PNN workload balancing, and 4) hierarchical reconfigurable aggregation unit (RAU). As a result, the proposed SoC achieves 8.245 mJ/frame of energy consumption and demonstrates >20 fps SLAM while consuming 164.9 mW power.
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Jung et al. (2024) studied this question.
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