Research of Impedance Optimization with Mesh Reference Ground

As electronic products continue to miniaturize, the demand for high efficiency in Advanced Package's high-end products is increasing. The RDL process, a crucial element in manufacturing, faces a significant challenge-board warpage. To address this manufacturing issue while optimizing the performance of high-speed circuits, this research modifies the power and reference planes from solid copper to a grid structure. However, designing the grid involves various factors such as open rate, residual copper rate, and opening method. Therefore, this study focuses on the design aspects of grid residual copper rate and open rate. Subsequently, a model of the grid plane is established, and the characteristics are extracted. The data is then integrated into an impedance matching equation on the grid plane. Finally, the equation's accuracy is verified through measurements on actual samples.