Low Temperature Material Discovery and Readiness for 1st Level Interconnect in Semiconductor Packaging

In recent years, there are more low temperature alloys or materials, lower than the standard SAC305 processing temperature, being introduced on printed circuit board level assembly. Reducing warpages, energy consumption, and creating a processing temperature hierarchy for multiple assembly processes, are some of the key drivers for the shift to the use of low temperature material. This has raised the interest of proliferating the use of similar alloys or material for 1 st level interconnect in semiconductor packaging, which is mainly in the form of solder bump or Cu pillar interconnect. In this paper, we discuss current available alloys or material that can be suitable candidates for 1 st level interconnect. We also conducted a survey to understand the challenges, readiness, and need of the industry for using low temperature material focusing on 1 st level interconnect. A summary of the options and survey findings will be shared.