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During charged device model (CDM) electrostatic discharge (ESD) events, MOSFET gate oxides may be exposed to high voltage stress lasting for a few hundred picoseconds or less, and the gate oxide breakdown voltage is an important parameter for ESD designers. This work presents an on-chip pulse generator fabricated in a 65-nm CMOS process capable of producing clean single-shot pulses with amplitude up to 6 V and pulse width as short as 200 ps. The pulse generator is used for an experimental investigation of MOS gate oxide breakdown voltage on a sub-ns timescale and to assess the validity of the power-law model.
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Drallmeier et al. (2024) studied this question.
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