Application of Digital Image Correlation (DIC) for deformation measurement of fan-out Wafer Level Package mounted on Printed Circuit Board

The Digital Image Correlation (DIC) technique is a widely used contactless method for measuring deformation and strain fields based on images obtained during an experiment. This study employs the DIC technique to measure the deformation and strain fields caused by a thermal load on non-embedded cross-sections of Fan-Out Wafer Level Packages (FO-WLP) mounted on Printed Circuit Boards (PCBs) made of different materials and solder ball alloys. The study examines PCBs with various Radio-Frequency (PJ) layers and different SAC solder alloys doped with different levels of Bismuth. Finite Element (FE) analysis (FEA) is used to gain a better understanding of the experimental results and to determine important metrics that can be correlated to the lifetime for temperature cycling of a FO-WLP on the corresponding PCB.