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The related research analyses a new procedure to design power-efficient analog integrated classifiers, achieving low power consumption of only 981nW. These classifiers demonstrate efficient processing of a large number of inputs, maintaining high precision and minimizing energy usage. The proposed classifier is built upon a Manhattan distance network, incorporating both a Manhattan distance circuit and a current comparator. Validation of the analog classifier was carried out using a dataset related to chronic kidney disease, achieving a high accuracy of 93.33%. Additionally, a comparative analysis was conducted with other analog integrated classifiers using kidney dataset. All related models were trained using a software-based equivalent one. The executed design was implemented using a TSMC 90nm CMOS process. It is simulated with the Cadence IC Suite. This classifier can be used as a structure in low-power biomedical sensor systems.
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Alimisis et al. (2024) studied this question.
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