This paper presents the design and implementation of an Electronic Voting Machine (EVM) using FPGA (Field Programmable Gate Array) technology and Verilog HDL (Hardware Description Language). The EVM is designed to provide a secure and reliable platform for voting, with minimal chances of tampering. The FPGA-based implementation allows for flexibility and customization, enabling efficient handling of control signals and ensuring the integrity of the voting process. The proposed design incorporates features such as a digital password for enhanced security, support for a large number of votes based on memory capacity, and candidate symbol display on a monitor using a Video Graphic Array (VGA) interface. The paper also discusses the utilization of Xilinx tools, such as Xilinx ISE and Vitis IDE, in the development process. The experimental results demonstrate the successful implementation of the EVM and its effectiveness in providing a secure and user-friendly voting experience. Overall, this paper contributes to the advancement of EVM technology by leveraging FPGA and Verilog HDL for robust and efficient design.
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Kalra et al. (2024) studied this question.
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