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February 8, 2024Open Access

FPGA/MATLAB Hardware in the Loop Testbed for Stochastic Artificial Neural Networks

Matthew Carrano Scott Koziol Eugene Chabot Jacob Boline John DiCecco

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Abstract

Abstract—This paper presents a Hardware in the Loop (HWIL) testbed for evaluating a Stochastic Artificial Neural Network (SANN). The SANN is implemented in a Field Programmable Gate Array (FPGA), and this testbed allows test data to be generated on a computer using MATLAB, and sent to the FPGA SANN over a Universal Asynchronous Receiver/Transmitter (UART) interface. Initial hardware results are presented.

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Carrano et al. (2024) studied this question.

synapsesocial.com/papers/68e7b7e2b6db64358770e92f https://doi.org/10.18260/1-2--36380

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