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October 13, 2025Journal of Electronic Packaging6 citationsOpen Access

Current Advances and Outlook of Advanced Packaging

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JLJohn H. Lau

Key Points

  • High bandwidth memory (HBM) is essential for AI-driven high-performance computing (HPC) products, showcasing significant advancements.
  • The study updates various IC integration types such as 2D and 3D, and highlights developments in packaging techniques like Cu-Cu hybrid bonding.
  • In-depth exploration of chiplet communication methods identifies key innovations in substrates and interposers for enhanced performance.
  • The integration of photonic and electronic interconnects emphasizes the push for higher data rates and AI compatibility in advanced packaging.

Abstract

Abstract In this study, 2D, 2.1D, 2.3D, 2.5D, 3D. 3.3D, and 3.5D IC integrations will be presented and updated. Chiplet communication such as bridges embedded in build-up package substrate and fan-out epoxy molding compound (EMC) with RDLs (redistribution layers) will be examined and updated. The high volume products by Cu-Cu hybrid bonding will be presented. High bandwidth memory (HBM) and customized HBM (cHBM) and CoWoS (chip on wafer on substrate) and CoPoS (chip on panel on substrate) are the key elements of high-performance computing (HPC) products driven by artificial intelligence (AI) will be discussed. CoWoS-S, CoWoS-R, and CoWoS-L will be systematically presented. Glass-core substrates and glass-core interposers will be provided. 3D heterogeneous integration of photonic IC (integrated circuits) (PIC) and electronic IC (EIC) driven by AI and high-speed communications will be presented. Some recommendations will be provided.

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Cite This Study

John H. Lau (2025) studied this question.

synapsesocial.com/papers/68ecc715d1cc7436f7d18915https://doi.org/10.1115/1.4070106
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Also Consider

Synapse has enriched 5 closely related papers on similar clinical questions. Consider them for comparative context:

  1. 1Low-Cost Thin Glass Interposers as a Superior Alternative to Silicon and Organic Interposers for Packaging of 3-D ICs2012 · 283 citations
  2. 2Thermal Performance of 3D IC Integration with Through-Silicon Via (TSV)2012 · 32 citations
  3. 3Impact of high density TSVs on the assembly of 3D-ICs packaging2012 · 29 citations
  4. 4Heterogeneous Integration on 2.3D Hybrid Substrate Using Solder Joint and Underfill2022 · 15 citations
  5. 5Redistribution Layers (RDLs) for 2.5D/3D IC Integration2014 · 56 citations