Global optimization of junction-to-case thermal resistance in TO-247 power MOSFETs using hybrid response surface methodology

Power MOSFETs face thermal reliability challenges due to multi-parametric coupling in packaging design. This work proposes a hybrid response surface methodology (RSM) framework that integrates discrete material screening (epoxy/solder/frame) and quadratic continuous-variable modeling (chip area/thickness, and solder/frame thickness). A five-layer equivalent chip model was validated with an experimental-simulation alignment of 98.09 %. Furthermore, the RSM model achieved a prediction accuracy of 93.97 %, enabling the global optimization of junction-to-case thermal resistance (Rjc). Optimized parameters reduced Rjc by 32.97 % (to 0.343 °C/W) compared to the baseline, resulting in a 10.84 % decrease in junction temperature across the 10–160 W load range. Compared to orthogonal experimental design, RSM yielded 12.45 % lower Rjc at higher optimization efficiency. Thermal-mechanical analysis confirmed structural integrity with stress within safety limits. This approach provides an efficient pathway for multi-parametric thermal management in power electronics.