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February 2, 2026Advanced Electronic Materials6 citationsOpen Access

Analysis of Magnetic Switching in Magnetically Coupled Dual Free Layers Within Magnetic Tunnel Junctions (MTJ) for STT MRAM

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SYShujun YeBeijing Institute of TechnologyKNKoichi NishiokaBeijing Institute of Technology

Key Points

  • The analysis aims to investigate how magnetically coupled dual free layers affect write current and thermal stability in STT MRAM.
  • Theoretical analysis of magnetically coupled dual free layers in magnetic tunnel junctions.
  • Assessment of the effects of magnetic coupling energy on magnetic reversals.
  • Identification of four distinct switching phases based on coupling energy and write current.
  • Phase 4 switching dominated with strong coupling, achieving maximum write current.
  • Phase 2 switching emerged with moderate coupling, leading to minimum write current.
  • The optimized coupling energy can reduce the write current requirement by 50%.
  • Thermal stability improved with increased coupling energy, achieving values exceeding 128.

Abstract

ABSTRACT For large‐scale deployment of spin‐transfer‐torque (STT) Magnetic Random Access memory (MRAM) in integrated circuits (ICs), achieving both a low write current (I w) and high thermal stability (Δ) in magnetic tunnel junctions (MTJ) is crucial. To address this challenge, theoretically investigated magnetically coupled dual free layers (FL1 and FL2), under the condition that the perpendicular magnetic anisotropy (PMA) of FL1 is smaller than that of FL2. Particular emphasis was placed on the effect of magnetic coupling energy (J cpl) on magnetic reversals and thermal stability of free layers. Depending on J cpl and I w, four distinct switching reversals were identified: Phase 1 (only FL1 reverses), Phase 2 (FL1 reverses first, followed by FL2), Phase 3 (simultaneous incoherent reversal of FL1 and FL2), and Phase 4 (coherent reversal of FL1 and FL2). When J cpl is strong, Phase 4 dominates, and the critical write current I crt reaches its maximum (I crtₘax). In contrast, when J cpl is moderately chosen, Phase 2 emerges, and I crt attains its minimum (I crtₘin). Notably, the ratio I crtₘin / I crtₘax consistently approaches 50%, demonstrating that an optimized J cpl can halve the write current requirement. Energy profile analysis revealed that Phase 4 involves a single high‐energy barrier, while Phase 2 exhibits a smaller prebarrier that precedes the main energy barrier. This double‐peak structure in Phase 2 enables a smaller switching barrier, resulting in 50% reduction in write current. Moreover, thermal stability increases with the increase of J cpl, and values exceeding 128 were achieved at the J cpl corresponding to I crtₘin in devices with a diameter of 30 nm. These values meet the requirements for reliable data retention for practical STT‐MRAM applications.

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Cite This Study

Ye et al. (2026) studied this question.

synapsesocial.com/papers/6980ff19c1c9540dea811bf9https://doi.org/10.1002/aelm.202500692
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