This research demonstrates chaotic time-series prediction in a CVD device, indicating advances in neuromorphic computing.
Monolayer MoS2 memtransistors offer gate-tunable hysteresis for neuromorphic reservoir computing, yet the role of operating window and fading-memory dynamics in CVD devices remains underexplored. We grow CVD monolayer MoS2, fabricate back-gated memtransistors, and use a single device as a time-multiplexed reservoir node for one-step Lorenz-63 prediction. Mobility, ON/OFF, hysteresis, and drift are quantified to identify stable, tunable bias regimes. We used a transistor with field-effect mobility on the order of 10 cm2 V−1 s−1, an ON/OFF ratio above 105, and a moderate hysteresis window quantified by H≈2.1μA·V at VDS=50 mV and H≈17μA·V at VDS=500 mV over VGS∈[−10,30] V. Performance is bias/memory-limited rather than FET-metric-limited. Sweeping gate-window and reservoir hyperparameters shows an optimum at intermediate hysteresis with moderate drift. Performance improves when the input clock matches the fading-memory time, achieving normalized root mean square error (NRMSE) = 0.09 for one-step Lorenz-63 x-prediction. Device-level statistics (discussed in the main text) show that, despite substantial scattering in electrical parameters, the resulting device-to-device NRMSE variation remains very small under fixed operating conditions. Classical FET metrics are not limiting here; NRMSE improvement instead requires engineering the hysteresis spectrum and gate stack. The demonstration of Lorenz-63 prediction using CVD-grown monolayer MoS2 memtransistors highlights their potential as a wafer-scalable platform for compact chaotic time-series predictions.
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Kurtash et al. (2026) studied this question.
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