This work demonstrates a fault detection scheme for negative control flipping faults in reversible circuits, suggesting improvements in low-power design.
Key Points
The study aims to develop an efficient method for detecting negative control flipping faults in reversible logic circuits using ATPG algorithms.
Utilizes automatic test pattern generation (ATPG) to create a test set for NCFFs.
Analyzes the correlation of NCFF with other existing fault models like SMGF, MMGF, and PMGF.
Conducts experimental validation on benchmark circuits to assess the proposed algorithm.
Successfully generated a complete test set for detecting NCFFs.
Demonstrated the effectiveness of the ATPG algorithm in identifying faults.
Assessed fault coverage capabilities of existing fault models in relation to NCFF.