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February 25, 2026Communications Engineering5 citationsOpen Access

Oxide semiconductor gain cell-embedded memory: materials and integration strategies for next generation on-chip memory

SCSang Won ChungSYSejun YoonJJJae Kyeong Jeong

Key Points

  • This review focuses on the advancements in oxide semiconductor gain cell-embedded dynamic random-access memory and its implications for future memory architectures.
  • Review of properties of oxide semiconductors for gain cell memory applications
  • Analysis of architectural structures such as gate-all-around and channel-all-around
  • Evaluation of scalability, power efficiency, and integration density challenges
  • Oxide semiconductors exhibit ultra-low leakage currents and wide bandgap characteristics.
  • Advanced memory architectures show potential for high-density integration.
  • Despite manufacturing and reliability challenges, this approach offers promise for AI and edge computing applications.

Abstract

The data processing demands of the digital era have exposed limitations in conventional memory architectures. Gain cell-embedded dynamic random-access memory based on oxide semiconductors is emerging as a solution, addressing scalability, power efficiency, and integration density challenges. Our review highlights that oxide semiconductors offer exceptional properties for gain cell memory applications, including ultra-low leakage currents and wide bandgap characteristics, while their advanced structures like gate-all-around and channel-all-around stacked architectures demonstrate the potential for high-density integration. While challenges in manufacturing and reliability persist, this paradigm shift in memory design holds promise for reshaping computing systems for artificial intelligence and advanced computing applications. The growing data demands of the digital era reveal the limits of embedded memory. Sang Won Chung and colleagues advance in oxide semiconductor gain cell embedded dynamic random-access memory (DRAM), outlining materials and integration toward power efficient, back-end-of-line (BEOL) compatible memories for AI and edge computing.

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Cite This Study

Chung et al. (2026) studied this question.

synapsesocial.com/papers/699e911bf5123be5ed04e65ahttps://doi.org/10.1038/s44172-026-00616-5
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