Investigates memory recall in hardware chaotic neural networks, suggesting improvements in image pattern recognition.
We aim to engineer reservoir computing using hardware chaotic neural networks, including associative memory recall. In this study, a reservoir layer was constructed using a pulse-type hardware chaotic neuron model (P-HCNM). The structure of the reservoir layer is simple and advantageous for hardware implementation. A hardware small-world neural network using a synaptic model and a gap junction model was constructed. The extent of memory recall in hardware reservoir computing was investigated using the reservoir layer. It was clarified that the P-HCNM could recall the image pattern when the recall signal was applied to the P-HCNM in an input layer, corresponding to the image pattern learned subsequently.
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Yamaguchi et al. (2026) studied this question.
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