Efficient FPGA Implementation of ECDSA Process based on the Combination of Dual Microblaze Processor and HW/SW Co-Design

Q: What does this research mean for the field?

The proposed FPGA implementation of the ECDSA process using a combination of dual Microblaze processors and HW/SW co-design significantly improves efficiency compared to traditional methods. Novelty: ClaimNovelty.METHODOLOGICAL. Consensus alignment: ConsensusAlignment.NEUTRAL.

Nesrine Guenfoud; Mohamed Issad; Debyeche Mohamed

doi:10.1504/ijhpsa.2025.10076906

January 1, 2025International Journal of High Performance Systems Architecture

Efficient FPGA Implementation of ECDSA Process based on the Combination of Dual Microblaze Processor and HW/SW Co-Design

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Key Points

To enhance the efficiency of the ECDSA process through FPGA implementation utilizing dual Microblaze processors and hardware/software collaboration.
Designed a dual Microblaze processor system for ECDSA implementation
Utilized hardware/software co-design techniques to improve efficiency
Evaluated performance metrics of the FPGA implementation
Achieved significant performance improvements in ECDSA processing speed
Demonstrated reduced resource usage compared to traditional implementations
Enhanced overall system efficiency with optimized hardware/software integration

Implication

The study demonstrates an efficient ECDSA implementation in FPGA using dual Microblaze processors, suggesting enhanced performance.

Abstract

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Cite This Study

Guenfoud et al. (2025) studied this question.

synapsesocial.com/papers/69b3ac9002a1e69014cce5dc https://doi.org/10.1504/ijhpsa.2025.10076906

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Efficient FPGA Implementation of ECDSA Process based on the Combination of Dual Microblaze Processor and HW/SW Co-Design

Key Points

Implication

Abstract

Discussion

Cite This Study

Efficient FPGA Implementation of ECDSA Process based on the Combination of Dual Microblaze Processor and HW/SW Co-Design

Key Points

Implication

Abstract

Discussion

Cite This Study

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