Demonstrates a low-temperature method for forming efficient 2D junctions in transistor arrays, suggesting enhanced integration.
Metallic two-dimensional (2D) materials enable van der Waals (vdW) contacts that suppress metal- and defect-induced gap states via an intrinsic interlayer gap; however, their conventional integration through film transfer or high-temperature chemical vapor deposition often damages the underlying 2D semiconductors. Here, we report a low-temperature (350 °C), transfer-free approach to form all-2D metal-semiconductor junctions with atomically clean vdW interfaces. A predeposited chalcogen layer (Te or Se) on 2H-MoTe₂ acts as both a reactive precursor and an encapsulation layer during patterned deposition of transition metals (Mo or Pt). Upon annealing at 350 °C, the chalcogen/transition-metal stack is converted in situ into metallic 2D electrodes (1T'-MoTe₂, 1T-PtTe₂, or 1T-PtSe₂), yielding damage-free vdW contacts. The resulting 2D transistor arrays exhibit efficient hole injection, high mobility (∼24 cm²/V·s), low contact resistance, and ultralow Schottky barriers (∼31 meV), with device-to-device variation below 3.7%. These metrics were consistently reproduced across large-area device arrays, underscoring integration uniformity and scalability. This scalable, low-temperature integration approach enables the uniform formation of metallic 2D contacts and reliable 2D FET operation across large-area device arrays.
No takes yet. Share an insight, caveat, or question.
Yang et al. (2026) studied this question.
Synapse has enriched 5 closely related papers on similar clinical questions. Consider them for comparative context: