The scalable deployment of Edge AI within the Internet of Intelligent Things (IoIT) is currently limited by a disconnect between theoretical model performance and physical hardware realities. As a result, many real-world systems fail to account for practical constraints that can impair performance, robustness, and long-term operation of embedded AI implementations. To bridge this gap, this article proposes an assessment framework designed to quantify the operational viability of the Bare Edge (CPU-only Single-Board Computers) through four well-defined stages, aimed at the assessment of three competing constraints: Energy ( C 1 ), Cost ( C 2 ), and Performance ( C 3 ). We validate this methodology through an exhaustive characterisation of 400 unique hardware-software configurations across the Raspberry Pi ecosystem, using state-of-the-art YOLO11 object detection as the target workload. The application of this framework uncovers a counter-intuitive Efficiency Inversion, where high-performance architectures consume less energy per inference task than their predecessors, and rigorously quantifies a “Python Tax” that dictates thermal stability in passive environments. Synthesising these empirical findings, we formulate the Efficiency-Viability Matrix, a strategic decision-making tool that model three operational archetypes: The Sentinel for autonomy, The Live Tracker for speed, and The Analyst for precision. This study provides system architects with a scalable roadmap for exploiting the Bare Edge, demonstrating that widespread visual intelligence is viable without the reliance on dedicated hardware accelerators. Ultimately, this research provides the scientific and academic community with a reproducible baseline that bridges the critical gap between theoretical AI algorithms and their physical viability, fostering sustainable democratisation of intelligent systems.
Oliveira et al. (2026) studied this question.