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This algorithm enhances measurement accuracy in power systems, suggesting improved signal processing techniques.
A robust, unconditionally stable, and accurate single‐phase P‐class phasor measurement unit (PMU) algorithm is proposed in this paper. It relies on fixed‐tuned cascaded delayed signal cancellation (CDSC) operators. The designed CDSC operators can suppress the harmonics as demanded by the IEC/IEEE 60255‐118‐1:2018 standard. To tackle the fundamental frequency variation, two similar CDSC blocks are cascaded via fixed‐tuned Park transformation. This algorithm avoids the use of integrators, matrix inversion, feedback paths and computationally demanding trigonometric functions or their inverse operations in its structure. It can be used for PMU data rates up to 100 frames per second (fps) for 50 Hz power systems. Among all types of standard tests, the maximum total vector error, frequency error, and rate of change of frequency error are obtained as 0.0774%, 1.6731 mHz, and 0.0415 Hz/s, respectively. This algorithm also meets the requirements of the input step test with a broad safety margin. Moreover, it can provide results within the allowable error limits for a signal‐to‐noise ratio greater than about 55 dB in the signal frequency test.
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Islam et al. (2026) studied this question.
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