Filters supporting dynamic reconfiguration that use the spectral parameter approximation (SPA) technique, together with other methodologies, and the interpolated spectral parameter approximation (ISPA) technique offer dynamic adjustment of the cutoff frequency (fc) with a narrow transition bandwidth and a very wide fc range. However, they suffer from a high multiplier requirement, leading to increased hardware resource usage. With fewer multipliers, we suggest the Multiply and Accumulate (MAC)-based SPA (MAC-SPA) and MAC-based interpolated SPA (MAC-ISPA) filter in this article. This article describes a unified MAC structure utilizing Time-Division Multiplexing (TDM) that uses the resource-sharing concept to implement an MAC-SPA and MAC-ISPA filter. The developed dynamically reconfigurable filter is implemented and realized using a 0.18 µm CMOS process. Additional testing was done on the Xilinx xc6vlx760-1ff1760 FPGA device. Relative to the filter that incorporates SPA along with the modified coefficient decimation method (MCDM), the obtained results reveal that the proposed MAC-SPA and MAC-ISPA channel filters, synthesized on FPGA, achieve a reduction in occupied slice count by approximately 7% and 4.76%, respectively. Although their operating speeds are slightly lower by about 9.4% for the MAC-SPA filter and 13.89% for the MAC-ISPA filter, this tradeoff is offset by significant savings in hardware resources, making both designs more area-efficient with only a modest reduction in speed.
Arivalagan et al. (Mon,) studied this question.