Lazy-expansion symbolic expression approximation in SYNAP

A lazy-expansion technique for generating small approximate symbolic analog circuit analysis expressions is described. Statistics for this technique as implemented in the symbolic analysis program SYNAP are presented and show a two order-of-magnitude speed improvement (on larger circuits) as compared with traditional full-expansion techniques. This technique also allows larger circuits to be analyzed. Methods used in SYNAP for eliminating pole and zero movement at the design point and for handling variables representing device mismatches are also presented.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>