This work demonstrates reduced Kirkendall voids in Cu@Sn core-shell nanoparticles, suggesting improved reliability for electronic applications.
Cu@Sn core–shell nanoparticles have emerged as promising candidates for high-density electronic packaging owing to their excellent mechanical strength, electrical conductivity, and thermal stability. However, the intrinsic mismatch in the interdiffusion rates of Cu and Sn inevitably leads to the formation of severe Kirkendall voids, compromising the microstructural integrity and overall device reliability. In this work, a solid Cu@Sn core–shell nanostructure was constructed by introducing trace amounts of P during the Cu–Sn chemical displacement process, which shows an optimized Sn-to-Cu thickness ratio of ∼10%, with a Cu core of 2.65 ± 0.06 μm and an Sn shell of ∼0.29 μm. At the Sn/Cu interface, P selectively enriches on the Cu surface to form an adsorbed layer, suppressing the inward diffusion of Sn, where P promotes the in situ formation of ultrafine Cu3P nanocrystals and exerts a significant interfacial pinning effect on outward Cu diffusion and increases the vacancy formation energy. Notably, thermogravimetric analysis confirms the substantially enhanced oxidation resistance of the solid Cu@Sn nanoparticles (residual mass at 600 °C: 109.66% for Cu@Sn vs 123.54% for bare Cu). When used as soldering precursors, the P-mediated Cu@Sn solid nanoparticles form dense Cu3Sn intermetallic compound (IMC) frameworks after reflow at 300 °C, yielding void-free joints with remelting temperatures above 425 °C. This work not only elucidates the mechanism by which P-mediated interfacial engineering suppresses Kirkendall void formation but also highlights the significant potential of Cu@Sn nanoparticles for high-reliability electronic packaging, offering a promising pathway toward enhanced power density and device reliability.
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Wu et al. (2026) studied this question.
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