LLM-Orchestrated PCB Design: From Schematic Understanding to Placement, Routing, and Iterative Refinement

This technical report proposes a method for LLM-orchestrated PCB design, introducing a large language model as a semantic translation layer between schematic-level design intent and formal placement constraints. The placement optimizer (CadMust-Neo) is implemented and open-source; the LLM orchestration layer is described at architectural level as a method disclosure to establish prior art. Experimental validation is planned as future work.