Texture and Grain Size Investigation in the Copper Plated Through-Silicon via for Three-Dimensional Chip Stacking Using Electron Backscattering Diffraction

We investigated microstructures, i.e., textures and grain sizes, which affect reliability and resistivity of through-silicon via (TSV). We used electron backscattering diffraction to clarify the textures and grain sizes in the copper TSV depth direction in specimens made from an 8-in. wafer with copper plating times of 60, 90, and 240 min. Textures for the three types of TSV specimens were random throughout the depth direction. Average grain size differed among top, middle and bottom regions, and decreased in the order, middle > bottom > top for 60 and 90 min plating specimens. Grain size dependence on the shortening of plating time was small.