The power density and efficiency of power-management integrated circuits (PMICs) is playing an increasingly important role in the miniaturization of modern computing platforms. Small inductors can be used to help miniaturize buck DCDC converters, however as noted in Fig. 8.2.1 (lower left), small inductors tend to have high DC resistance (DCR) - greater than a comparably-sized CMOS switch - such that they ultimately limit the achievable power density of miniaturized buck converters to <;0.4 mm 2 when including the area of both the passives and the PMIC [1, 2]. While recent work in switched-capacitor (SC) converters has shown that high power density is achievable, it is only possible when employing exotic ultra-high-density capacitors and when operating over a small number of conversion ratios; increasing the number of ratios to support the needs of dynamic voltage scaling loads (e.g., 0.4 to 1.2V) alongside use of conventional capacitor technologies degrades power density to <;<;0.1 W/mm 2 [3]. Hybrid converters, which process power with both capacitors and inductors, offer an attractive means to potentially increase power density and/or efficiency. Resonating an SC circuit with an inductor can, for example, dramatically increase power density to 0.9W/mm 2 in [4], however with limited, though improved in [4], ability to regulate beyond the nominal SC ratio at high efficiency. Hybrid multilevel converters can regulate to arbitrary output voltages, though still achieve power density <;0.3 W/mm 2 , [5], in part due to the increased number of passives and associated higher routing complexity, and in part due to the large conversion ratio in the design in [5].
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Abdulslam et al. (2019) studied this question.
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