A 4-Phase 30–70 MHz Switching Frequency Buck Converter Using a Time-Based Compensator

A high switching frequency multi-phase buck converter architecture using a time-based compensator is presented. Efficiency degradation due to mismatch between the phases is mitigated by generating precisely matched duty-cycles by combining a time-based multi-phase generator (MPG) with a time-based PID compensator (T-PID). The proposed approach obviates the need for a complex current sensing and calibration circuitry needed to implement active current sharing in an analog controller. It also eliminates the need for a high resolution analog-to-digital converter and digital pulse width modulator needed for implementing passive current sharing in a digital controller. Fabricated in a 65 nm CMOS process, the prototype multi-phase buck converter occupies an active area of 0.32 mm <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">²</tex></formula> , of which the controller occupies only 0.04 mm <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">²</tex> </formula> . The converter operates over a wide range of switching frequencies (30–70 MHz) and regulates output to any desired voltage in the range of 0.6 V to 1.5 V from 1.8 V input voltage. With a 400 mA step in the load current, the settling time is less than 0.6 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">μ</tex> </formula> s and the measured duty-cycle mismatch is less than 0.48%. Better than 87% peak efficiency is achieved while consuming a quiescent current of only 3 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">μ</tex> </formula> A/MHz.