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Low-energy etching manipulates thickness of 2D MoS2 layers on-chip, suggesting new electronic applications.
Thickness is a critical parameter of two-dimensional (2D) semiconductors that could significantly influence their electronic properties, such as bandgap, carrier mobility, majority carrier type, and transistor polarity. However, 2D flakes and related van der Waals (vdW) heterostructure devices are largely produced through mechanical peeling of bulk crystals with uncontrollable 2D flake thickness. Here, we report a low-energy vdW etching approach to manipulate 2D thickness on-chip, which enables re-peeling MoS₂ flakes after exfoliation on a substrate. By designing the interaction force between 2D flakes and metals, the top MoS₂ layers can be physically etched when the metal is peeled off on-chip, and the intrinsic properties of the remaining 2D layers are well retained, resulting in a controlled etching process with atomic-layer precision. Atomic force microscopy confirms the atomically flat surface (roughness of 0.21 nm), which is in great contrast to conventional plasma etching methods (roughness of 1.26 nm). Furthermore, we found that etched thickness could be controlled from 2 nm to over 50 nm by adopting different metals on-chip. This behavior is further explained by a simple mechanical model based on the competition between in-plane force and out-of-plane vdW interactions.
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Li et al. (2026) studied this question.
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