A 4×112 Gb/s PAM-4 Silicon-Photonic Transmitter and Receiver Chipsets for Linear-Drive Co-Packaged Optics

A <tex-math notation="LaTeX">4 × 112 </tex-math> Gb/s hybrid-integrated silicon photonic (SiPh) transmitter and receiver chipsets are presented for the linear-drive co-packaged optics (CPO). A quad-channel open-collector (OC) driver is co-designed with the arrayed traveling-wave (TW) Mach-Zehnder modulator (MZM) for high bandwidth (BW) and high efficiency. A second-order hybrid passive-active continuous-time linear equalizer (CTLE) is proposed to compensate for the nonlinear channel loss up to 12 dB. A linear trans-impedance amplifier (TIA) is proposed with a T- <tex-math notation="LaTeX">π </tex-math> input network and cascaded embedded CTLE, which boosts the BW while maintaining a flat in-band frequency response. Implemented in 180-nm SiGe BiCMOS, the driver and TIA are measured with over 35-GHz BW. The complete SiPh TRX is built by co-packaging both the driver with MZM and TIA with photodetector (PD). Experimental results show 112-Gb/s PAM-4 eyes of both the E-to-O modulation and O-to-E reception. The OTX achieves a 5-dB optical extinction ratio (ER) and 4.8-pJ/bit power efficiency, while the ORX achieves 67-dB <tex-math notation="LaTeX">Ω </tex-math> trans-impedance and 2.95-pJ/bit power efficiency. To emulate CPO application, a compact-size evaluation board (EVB) is made, and four-channel tests are completed.