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We report the integration of a ferroelectric (FE) silicon-doped hafnium oxide material in ferroelectric field-effect transistor (FeFET) devices fabricated with an optimized interfacial layer in a gate-first scheme. The effect of increasing the permittivity (k) value of the interface layer on the performance of the metal–ferroelectric–insulator–semiconductor (MFIS)-FE-HfO 2 FeFET is studied in terms of its switching characteristics, endurance, and retention. In contrast to the previous work, the FE Si:HfO 2 -integrated FeFET devices show a low-power operation capability as well as an improved endurance characteristics without jeopardizing high-temperature retention. The utilization of an optimized SiON interface layer for MFIS-HfO 2 FeFET stack is discussed, and the improvements are outlined with reference to a standard low-k SiO 2 interface.
Ali et al. (Tue,) studied this question.