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In this paper, we investigate the effect of interface trap charges on the variation of heterogeneous gate dielectric junctionless-tunnel FET (JL-TFET) by introducing both donor and acceptor type of localized charges at the semiconductor/insulator interface. In this regard, we have analyzed dc and analog/RF performance parameters for conventional and heterogeneous gate dielectric JL-TFET (HD JL-TFET) in terms of electric field, transfer characteristics, transconductance (g m ), output transconductance (g ds ), parasitic capacitances, device efficiency, cutoff frequency(f T ), gain bandwidth product, and transconductance frequency product. Apart from these, linearity distortion parameters are also analyzed in the form of higher order transconductance coefficients (g m1 , g m2 , g m3 ), VIP2, VIP3, IMD3, and IIP3. For this, high-K gate dielectric material (HfO 2 ) is used in the case of the HD JL-TFET to improve the performance of the device. All the simulations for both devices have been performed with the help of an ATLAS device simulator.
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Gupta et al. (2017) studied this question.
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