This work proposes cache architectures for efficient resource use in mixed-criticality 5G base stations, indicating improved performance for critical tasks.
The advancement of telecommunication technology is necessary to support the rapid development of societies. The latest standard in telecommunications, 5G, offers unprecedented communication speeds, reach, and quality. The 5G standard supports both critical and non-critical telecommunications. The baseband units—handling wireless signal transmission and reception—divide hardware resources to ensure that high- and low-criticality communication tasks do not interfere with each other. This results in underutilized hardware platforms with high redundancy. In this paper, we propose two level 2 cache architectures that allow a single system to handle high- and low-criticality tasks and improve resource utilization while prioritizing critical tasks. The contention-tracking cache tracks contention among tasks of differing criticality for shared resources and locks those resources for critical tasks once a contention limit is exceeded. The criticality timeout cache sets timers for cache lines accessed by critical tasks and decrements them as long as the lines remain unused. Non-critical tasks are not allowed to evict these lines until the timer has finished. We evaluate the behavior of the proposed cache designs using a simulation framework and a real-world workload from a 5G baseband unit. Additionally, we implement the proposed caches in hardware, along with a baseline PLRU cache, and evaluate their performance and resource usage using the T-CREST platform. The simulation and performance results confirm that the proposed cache architectures can prioritize critical memory access, while allowing non-critical tasks to utilize the cache’s free space.
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Maroun et al. (2026) studied this question.
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