A Continuous-Field Photonic Chip Architecture: 3D In-Memory Computing with Dynamic Weight Modulation via PHAT B³D-HPA Architecture & PDMM Instruction Set Specification (v3.53 & v1.3)

April 7, 2026Open Access

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Key Points

The aim is to provide foundational documentation for a new photonic computing architecture that utilizes dynamic weight modulation.
Introduced the B³D-HPA photonic chip architecture integrating a dual-modality framework.
Detailed specifications of the PDMM Physical Dual-Modality Mapping Instruction Set for hardware implementation.
Established a noise filtering mechanism based on topological noise and photodetector noise.
Achieved significant energy efficiency compared to traditional silicon-based arithmetic units.
Developed a robust framework for integrating high-level programs into photonic systems.
Demonstrated reliable physical-layer noise filtering without the need for complex digital algorithms.

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This documentation details a photonic computing framework that enables dynamic weight modulation, enhancing computational efficiency.

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Xiangning Chen (2026) studied this question.

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