3D IC's promise to solve the 2D communication bottleneck, and enable the integration of heterogeneous materials, devices and systems. There are at least three approaches to realize 3D IC's : chip stacking, wafer stacking and full monolithic integration. Each approach is at a different level of maturity and offers various degree of improvement. This paper will focus on the monolithic 3D approach, which offers a high density of device-dimension vertical interconnects and thereby facilitates the optimal assembly of transistors and interconnects in a 3D volume. The performance advantages of such a technology are demonstrated with a 3D-FPGA. Technology challenges of monolithic approach are discussed.
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Wong et al. (2007) studied this question.
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