How Can the Carrier Mobility in Planar Si-Based MOSFETs Be Enhanced?

In MOSFETs, mobility enhancement is a key factor for improving the electrical performance and enabling their use in new applications, such as low-power, digital, and medical applications. This mobility improvement can be technically achieved by using different techniques that exploit the complex behavior of mobility (Coulomb, phonon, and surface roughness mobilities). Previous reviews have primarily focused on two main technologies: the introduction of mechanical stress and crystallographic orientation. Therefore, this review summarizes all key techniques that can enhance mobility, and each of these techniques is linked to a physical origin. Mechanical stress notably affects phonon mobility, whereas silicon thickness and channel impurities mainly affect the Coulomb mobility. Moreover, the dielectric oxide type, heat treatments, surface cleaning, ionic implantation in the oxide, and oxynitrides affect surface roughness mobility. In addition, the crystallographic orientation affects Coulomb, phonon, and surface roughness mobilities. Furthermore, the study of the series resistance engineering also affects the performance. Therefore, the simultaneous use of multiple of these techniques leads to an enhancement of the effective mobility at low, medium, and high effective electric fields, and the combined effect results in a more significant mobility increase.