Electrical Modeling and Characterization of Silicon-Core Coaxial Through-Silicon Vias in 3-D Integration

Based on the extracted resistance, inductance, capacitance, and conductance parameters, this paper introduces the distributed transmission line model of silicon-core coaxial through-silicon vias (CTSVs), in which the vertical interconnect is made of a Cu-coated silicon pole. The proposed model is validated against a commercial electromagnetic simulation tool, showing it is highly accurate up to 100 GHz. Using the proposed model, the impact of various material properties and physical parameters on the electrical performance of the silicon-core CTSVs is investigated. It is observed that the thickness of the plated Cu and isolation dielectric are two important parameters that determine the electrical performance of silicon-core CTSVs. Performance comparison shows that the proposed silicon-core CTSVs provide a comparable performance to standard Cu-based CTSVs and better performance to the conventional signal-ground TSV pairs. The results in this paper would provide some design guides for silicon-core CTSVs in 3-D integration.