Pulse‐Modulated Polarization Switching Dynamics in Ferroelectric Thin Film for Circuit‐Level Implementation of Multi‐Bit FeRAM Cell

Increasing the storage density of ferroelectric random‐access memory (FeRAM) by device scale‐down has reached technological limitations. Multi‐bit FeRAM cell is proposed as a promising solution. However, its working principle and feasibility have not yet been demonstrated at the circuit level. Specifically, sensing multiple polarization states in FeRAM cells requires complex readout logic. Here, it is reported that the ramp‐up rate of voltage pulse can effectively control the polarization switching dynamics in systems hosting multistep polarization switching manifested with different peak distributions in the switching current transient depending on the ramp‐up rate. Novel operation schemes (i.e., reading and writing) of the multiple polarization states can be realized based on the pulse‐modulated polarization switching dynamics. Specifically, the reading scheme of the multiple polarization states utilizes the ramp‐up rate of the voltage pulse, whereas the writing scheme utilizes the width of the voltage pulse. Furthermore, multi‐bit FeRAM cells are implemented at the circuit level, showing the compatibility with commercial FeRAM in terms of circuit architecture and the potential to reduce hardware overhead and latency of high‐density FeRAM. Potential applications of the multi‐bit ferroelectric capacitor in in‐memory computing and hardware security are further demoed, extending the potential of FeRAM beyond the traditional conception of data storage.