Tracking-parallel analog-to-digital converter

Amid the rapid evolution of digital signal processing systems, the development of new analog-to-digital converter architectures capable of ensuring high dynamic accuracy without an excessive increase in component count has become a priority. The aim of the work was to improve the dynamic accuracy and speed of the analogto-digital conversion process by developing and investigating an improved tracking-parallel architecture. Methods of automatic control theory, circuit analysis of pulse devices, and mathematical modelling of quantisation errors were applied to achieve the set tasks. The article detailed the operating principle of the proposed device, which is based on the synergy of an inertial tracking loop and a high-speed parallel residue converter. It was proven that introducing a dynamic error measurement stage allows compensating for the output code lag relative to the input signal, typical for traditional tracking systems, thereby eliminating slope overload distortion. The dependence of the input signal dynamic range expansion on the resolution of the parallel block was analytically substantiated, allowing for flexible system adaptation to specific application requirements. Comparative analysis results indicated that the proposed structure provides a significant gain in hardware complexity, enabling high resolution using orders of magnitude fewer precision comparators compared to counterparts. Furthermore, critical requirements for the speed of the operational amplifier and the digital-to-analog converter in the feedback loop were defined to ensure stable operation across the entire frequency range. The practical value of the research lies in developing recommendations for designing competitive integrated circuits oriented towards use in portable devices, medical equipment, and industrial automation systems