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A 2-Mbit CBRAM (Conductive Bridging Random Access Memory) core has been developed utilizing a 90 nm, VDD=1.5 V process technology. The presented design uses an 8F 2 (0.0648 mum 2 ) 1T1CBJ (1-Transistor/1-Conductive Bridging Junction) cell and introduces a fast feedback regulated CBJ read voltage and a novel program charge control using dummy cell bleeder devices. Random read/write cycle times les50ns are demonstrated
Dietrich et al. (Sun,) studied this question.