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Investigates pulse compression capabilities in high-voltage DSRD generators, indicating optimization strategies for performance.
A high-voltage generator of nanosecond pulses utilizing a drift step recovery diode (DSRD) as an opening switch in the compression section is designed to operate at peak voltages of 4 kV and repetition rates of 2 MHz in burst mode at reduced voltages. The generator is used to perform empirical studies on the output metrics of a DSRD generator with a focus on matching the circuit of the reverse current loop parameters and DSRD to the load. The dynamic impedance introduced by nonlinear elements in the DSRD was investigated with respect to the driving circuit by varying the number of DSRDs connected in series. Experimental results indicate that optimization of the driving circuit for the DSRD is key to minimizing losses and achieving optimal pulse compression. The results also indicate trends in DSRD performance as larger storage inductances and longer pumping times are used, limiting the pulse compression capabilities of a single stage DSRD generator.
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Smith et al. (2026) studied this question.
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