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During positive bias temperature (BT) aging, a large number of interface traps on p/sup +/(B) polysilicon MOS devices are generated in the upper half of the bandgap without an increase in the charges trapped in the gate oxide. The increase in interface traps can be reduced by processes which exclude the hydrogen included during fabrication. The increase in the interface-state density is explained as follows. The generation of the interface traps is caused by hydrogen ions reaching at the SiO/sub 2//Si interface through the gate oxide from the polysilicon-gate electrode. The hydrogen ions combine with activated boron and are released from the boron under positive BT aging. The increase in interface traps is formulated by equations which are derived from the above model.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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Ushizaka et al. (1993) studied this question.
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